man6/nec_seq

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Name

nec_seq - NEC Sequence Controller CAMAC module

Description

The Sequence Controller is the master module in an NEC MBS sequencing system.

CAMAC Register Layout

See the section Register Bit Layout of details about each register.
A0 F16 - Control Status Register
A1 F16 - Max State / Maint State Register
A2 F16 - LAM clear

A0 F17 - State Register 0
A1 F17 - State Register 1
A2 F17 - State Register 2
A3 F17 - State Register 3
A4 F17 - State Register 4
A5 F17 - State Register 5
A6 F17 - State Register 6
A7 F17 - State Register 7
A8 F17 - State Register 8
A9 F17 - State Register 9
A10 F17 - State Register 10
A11 F17 - State Register 11
A12 F17 - State Register 12
A13 F17 - State Register 13
A14 F17 - State Register 14
A15 F17 - State Register 15

Register Bit Layout

Control/Status Register
This is an 8 bit register whose bits assignments are:

bit 0 - stop/run
bit 1 - free_run/line_sync
bit 2 - line_sync polarity
bit 3 - lam enable
bit 4 - norm/maint mode

Max State / Maint State Control Register
This is an 8 bit register whose bits assignments are:

bits 3-0 - maximum state
bits 7-4 - maint mode state

LAM Clear
Writing a CAMAC instruction to this address clears a pending LAM. Yes, I know, this is not the standard address for doing this.

State Registers

Applicable part numbers

2HA054190
This is the wirewrapped version of the circuit.
2HA0????0
This is an FPGA based circuit design. It is functionally identical to the 2HA054190 model.

Software support

Support for this module in AccelNET is provided by MBSseqTask. See the manual page MBSseqTask(8) for more information.

Manual page revision

$Id: nec_seq.6,v 1.0 2001/08/06 19:18:43 kitchen Exp $

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